Authenticated encryption schemes provide both confidentiality and integrity services, simultaneously. CAESAR competition will identify a portfolio of authenticated ciphers, which is expected to be suitable for widespread adoption and offers advantages over AES-GCM. An important criterion for selecting the final candidates, besides security, is the hardware performance in resource-limited environments. In this paper, SILC, CLOC, AES-JAMBU, and COLM authenticated ciphers have been selected from the third round of the CAESAR competition for hardware evaluation. The main reasons to choose these schemes are their lightweight design, sufficient security level, and the use of the AES algorithm as their underlying block cipher. To the best our knowledge, it is the first time that an 8-bit lightweight architecture which is compatible with API v2 is presented for the selected schemes. To implement AES, the Atomic-AES v2 which is one of the smallest implementations has been adopted according to the requirements of the selected schemes. Furthermore, to reduce the area in the hardware implementation, several techniques are used, including implementing one AES core in the datapath, sharing registers to store intermediate values, implementing the tweak functions with the shuffling of wires, and implementing doubling on the GF(2128) with 8-bit architecture to construct the higher-order multipliers. The implementation results are presented on ASIC and FPGA platforms. The proposed architecture for each scheme on the two platforms is similar, but different optimization techniques are used for each platform, e.g. the AES S-box is implemented as ROM-based and logic-based on FPGA and ASIC, respectively. The comparing of the results with 128-bit implementations shows that the area on FPGA and ASIC is reduced up to 65% and 88%, respectively. The results of the current study demonstrate that AES-JAMBU has the lowest hardware area and the highest throughput and performance on both platforms. Besides, CLOC has the highest area reduction on both platforms, compared with those of the 128-bit implementations. (C) 2019 Elsevier B.V. All rights reserved.